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APPLICATION
NOTE
The content of this note is based on information received from manufacturers in the electrical and electronics industries or
their representatives and does not imply practical experience by Elektor Electronics or its consultants.
TPS60100
Charge Pump for 3.3-V Systems
by G. Kleine
Inside the latest state of the art DC/DC converter from Texas Instru-
ments, two synchronous charge pumps work at 180 degree phase shift
on one output. This clearly reduces the output ripple voltage.
The TPS60100 has been designed especially
for battery operated equipment using 1.8 V to
3.6 V batteries (two NiCd or NiMH cells). It
delivers an output current up to 200 mA at
3.3 V and for this it needs only four external
(SMD) capacitors. In this design there is no
need for any over dimensioned, complicated
or hard to come by chokes.
The IC is contained in a thermally
improved TSSOP housing, what the company
calls a PowerPAD. By using a heatsink, a
power loss of up to 25 W can be reached.
TPS60100
0
°
CHARGE PUMP 1
IN
T11
T12
OSCILLATOR
C1+
180
°
C
1F
C1–
T13
T14
SKIP
OUT
PGND
COM
CONTROL
CIRCUIT
FB
3V8
CHARGE PUMP 2
SYNC
IN
Internal circuit of the Tandem
charge pump
The inner working of the TPS60100 can be
seen in
Figure 1
. Both Charge pumps work
with High Power MOSFET switches, whereby
the pump capacitor C1F, in the first half cycle,
is combined with T12 and T13 and C2F
respectively with T22 and T23, with IN and
PGNG linked together. Thus the capacitors
are charged to the input voltage. For that to
be achieved, MOSFETs T11/T14 and T21/T24
should have a high resistance.
In the second half cycle, the transistor
pairs conduct, to enable the pump capacitors
to be connected to IN and OUT, whereby T12
and T13 (T22 and T23) are held at high resis-
tance. The voltage at the pump capacitor
stores the charge of the input IN potential.
Theoretically this gives rise to an output volt-
age twice as large as the voltage at the input
IN. The charge distributes itself during this
cycle phase between the pump capacitor CxF
T21
T22
C2+
V
REF
C
2F
C2–
SHUTDOWN
START-UP
CONTROL
T23
T24
ENABLE
OUT
0.8 x V
I
PGND
005616 - 11
GND
Figure 1. Internal circuit diagram of the TPS60100.
and the output capacitor Cout.
If both charge pumps were to
work in push-pull then the output
would be charged every half cycle.
Consequently, a constant output
current can flow, in comparison to
other state of the art single phase
charge pump ICs, where the current
can only flow during the charge dissi-
pation phase. If the pump capacitors
are to be charged from the IC supply
then the output capacitor has to sup-
ply the current flow. This causes a rip-
ple voltage. Thus a push-pull configu-
ration of the TPS60100 clearly reduces
the ripple voltage effect. For the
designs discussed further on, Texas
Instruments state typical values of
5mV
pp
, which can still be further
reduced using output filters.
58
Elektor Electronics
2/2001
APPLICATION
NOTE
In order to control the output volt-
age, there is a feedback pin FB,
which allows the output voltage to
be compared with an internal refer-
ence voltage and then via the
Con-
trol Circuit
further regulates the
charge pumps. Subsequently it is
feasible to skip charge cycles in a
controlled manner if too large an
input voltage appears, by applying
the Pulse Skip configuration
(SKIP=IN). Equally possible is the
Constant Frequency configuration
(SKIP=GND) where the internal
MOSFETs are so arranged that the
output voltage remains at the cho-
sen value.
The block
Shutdown/Start-Up
Control
controls the IN and OUT
switch sequencing by controlling
ENABLE and driving the input volt-
age high. When switched, both
MOSFETs T12 and T14 (T22 and T24)
conduct, so that the output OUT is
linked to IN. This allows the output
capacitor Cout to directly charge
itself from the input voltage. At
0.8 V
IN
the
Start-Up-Control
finally
frees up the charge pumps. This is
aranged by using the lower com-
parators shown in Figure 1. Thus the
TPS60100, even with a load resis-
tance as low as 16 Ω, can still be
relied on to start oscillating.
Finally the DC/DC-Converter also
possesses the
Undervoltage-Lock-
out
-Function. With an input voltage
less than 1.6 V the chip automati-
cally shuts itself down.
3V3
200mA
1V8...3V6
SKIP
COM
3V8
IN
IN
OUT
OUT
C
C
I
O
FB
TPS60100
Mode Operation
The charge pump IC allows a wide
variety of operational configurations
using the five control inputs.
10µ
22µ
C
C1+
C2+
C
1F
2F
TPS60100
2µ2
2µ2
C1–
C2–
ENABLE
PGND
SYNC
GND
OFF/ON
005116 - 12
–
ENABLE
: activates DC/DC-con-
verter
–
SKIP
: switches between Constant-
Frequency and Pulse-Skip mode
–
3V8
: switches between regulated
3.3 V mode and unregulated 3.8 V
mode
–
SYNC
: switches between an inter-
nal and external clock signal
–
COM
: switches between Push-pull
and Single-end mode
Figure 2. 3.3V DC/DC converter in Push-pull
and Pulse-skip mode.
the TPS60100 on and off. The internal Oscil-
lator works with a clock frequency of about
300 kHz. The Pin SKIP controls switching
between the Constant Frequency mode and
Pule-Skip mode. Notably, the Pulse-Skip-
Mode economises on battery energy by
switching with a low current consumption
during the Constant-Frequency-Mode, giving
rise to a lower ripple Voltage. Voltage Control
is somewhat better in Pulse-Skip mode than
in Constant-Frequency mode, where one has
to take the variable ripple frequency into
account. Connect SKIP to IN and the Pulse-
Skip mode is activated. A Low at the SKIP pin
switches over to Constant-Frequency-Mode.
The 3V8 Pin allows a choice between the
regulated 3.3 V mode and higher 3.8 V volt-
age output (for an ancillary Low-Drop-out
The tandem pump charger is acti-
vated by taking the ENABLE Pin
high. This is done by linking the
ENABLE connection to IN. By apply-
ing a pull-up resistor at IN, a LOW
(open-drain-output) at ENABLE will
disable the converter, so that it con-
sumes less than 1
A (typically
0.5 µA) and the load is separated
from the battery. This method puts
the ENABLE to good use, switching
µ
2/2001
Elektor Electronics
59
APPLICATION
NOTE
Regulator). Connect the pin to IN and the
TPS60100 produces 3.8 V rather than the reg-
ulated 3.3 V.
The control input SYNC configuration
depends upon whether the internal 300 kHz
clock or an external clock is used (fed back
into the 3V8 connection). The IC will now
remain in 3.3 V mode. A 3.8 V simultaneous
output for an auxiliary Low-Drop-Regulator
using an external clock is not available. When
SYNC is linked to the IN potential then the
external clock is enabled. SYNC to ground
always means internal clock.
The COM connection allows a fundamen-
tal operation which lies between Push-Pull-
and Single-ended mode. Push-Pull means
that both internal charge pumps are work-
ing in anti-phase and thus minimizing the
lowest possible ripple voltage. Single-ended
mode corresponds to the conventional sim-
ple state of the art charge pump. Both
charge pumps in the TPS60100 work syn-
chronously, so that one can dispense with
one charge capacitor and link the connec-
tions of both charge pumps together. At C1+
and C2+ as well as C1– and C2– there is
then only one capacitor, thus the number of
components and printed circuit board size
can be further reduced.
3V3
200mA
1V8...3V6
SKIP
COM
3V8
IN
IN
OUT
C
OUT
C
I
O
FB
10µ
22µ
C
C1+
C2+
C
1F
2F
TPS60100
2µ2
2µ2
C1–
C2–
ENABLE
PGND
SYNC
GND
OFF/ON
005116 - 13
Figure 3. 3.3V DC/DC converter in Push-pull aund Constant-Frequency mode.
3V3
200mA
1V8...3V6
SKIP
COM
3V8
IN
IN
OUT
OUT
C
C
I
O
FB
10µ
22µ
C1+
C2+
TPS60100
C1–
C2–
ENABLE
PGND
SYNC
GND
OFF/ON
C
F
4µ7
005116 - 14
Figure 4. 3.3V DC/DC converter in Single-ended and Pulse skip mode.
Applications
EXTERNAL
CLOCK
The TPS60100 circuit diagram arrangement
in
Figure 2
depicts a 3.3 V DC/DC converter
in Push-Pull and Pulse-Skip mode. During the
regulation of 3.3 V the charge pumps are
working in low distortion mode by the
intended release of pulses. The capacitors are
minimally dimensioned. The output capacitor
should be about 5 to 50 times larger than the
pump capacitor.
The input capacitor improves the input
impedance of the circuit. It should be 2 to 4
times larger than the pump capacitor
C1F/C2F. It‘s recommended that for the pump
capacitors only ceramic types should be
used. Tantalum electrolytic capacitors are not
suitable for the purpose.
Figure 3
shows the same circuit for Con-
stant-Frequency-mode, where by control of
the voltage regulation occurs by means of
modulating the MOSFET internal resistance.
Here SKIP is connected to ground.
The 3.3V DC/DC converter in
Figure 4
requires the smallest amount of components.
It works in Single-ended- and Pulse-Skip
mode. The charge pumps work synchro-
nously and not in anti-phase. The pump
capacitor must be shared and is simultane-
ously connected on both charge pumps via
C1+/C2+ and C1–/C2–. It should have dou-
ble the capacitance (here, 4.7
3V3
200mA
1V8...3V6
SKIP
COM
3V8
IN
IN
OUT
OUT
C
C
I
O
FB
10µ
22µ
C
C1+
C2+
C
1F
2F
TPS60100
2µ2
2µ2
C1–
C2–
ENABLE
PGND
SYNC
GND
OFF/ON
005116 - 15
Figure 5. 3.3V DC/DC converter in Push-pull and Constant-Frequency-mode with
external clock.
2.2
F) and a ceramic type.
An example of a circuit with an
external clock supply is shown in
Figure 5.
TheTPS60100 works as
a 3.3-V DC/DC converter in Push-
Pull (Anti-Phase) and Constant-
Frequency-Mode. The external
clock is fed into Pin 3V8. The fre-
quency must lie between 400 kHz
and 800 kHz, where the clock fre-
quency of the charge pump is half
the value of the input frequency.
The voltage level of the external
µ
clock signal must lie below
0.3 Vin for a Low and above
0.7 Vin for a High.
Improved Efficiency
Although the output current of
200mA from the TPS60100 is consid-
erably well above the standard
charge pumps, it is possible through
direct parallel switching of two
TPS60100 to double it, so that
400mA is available for use. As
Fig-
µ
F instead of
60
Elektor Electronics
2/2001
APPLICATION
NOTE
3V3
400mA
1V8...3V6
SKIP
COM
3V8
SKIP
COM
3V8
IN
IN
OUT
IN
IN
OUT
OUT
OUT
FB
FB
10µ
10µ
47µ
C1+
C2+
C1+
C2+
TPS60100
TPS60100
2µ2
2µ2
2µ2
2µ2
C1–
C2–
C1–
C2–
ENABLE
PGND
SYNC
ENABLE
PGND
SYNC
GND
GND
OFF/ON
005116 - 16
Figure 6. Parallel switching multiplier 3.3V DC/DC converter.
3V3
200mA
0µH1
example, 50 kHz), in order to suppress the
internal switching frequency of 300 kHz. A
possible disadvantage of using this filter is
increased voltage loss.
Figure 7
shows a recommended Texas
Instruments variation. Here, the LC-Filter is
in the feedback loop. The Feedback-connec-
tion FB taps off from the load behind the low-
pass LC filter. Due to stability reasons a high
roll-off frequency (500 kHz) must be selected,
otherwise instability can occur.
1V8...3V6
C
O
SKIP
COM
3V8
IN
IN
OUT
22µ
1µ
OUT
C
I
FB
10µ
C
C1+
C2+
C
1F
2F
TPS60100
2µ2
2µ2
C1–
C2–
ENABLE
PGND
SYNC
GND
OFF/ON
005116 - 17
Figure 7. 3.3V DC/DC converter in Push-pull and Constant-Frequency-mode with
LC-Filter to reduce ripple effect.
Note:
Maximum Dissipation Loss
To end with, here is the formula to calculate
the power dissipation of the TPS60100.
1400
30
1200
25
1000
P
v
= 2
⋅
I
out
⋅
V
in
– I
out
⋅
V
out
20
PWP Package
800
15
Here it is assumed that the output current
I
out
far exceeds the internal current con-
sumption of 90 µA.
Figure 8
shows two dia-
grams which define the maximum possible
power dissipation in relation to the ambient
temperature and case temperature. Without a
heatsink, a power dissipation of only 700 mW
is possible. However, with a heatsink the IC
can cope up to 25 W , so long as the case
temperature can be maintained at 60 °C,
using the size of the heatsink (heat resis-
tance). At higher case temperatures the max-
imum allowable power dissipation is
reduced (derating effect)
The efficiency of these charge pump IC‘s
may be computed from the ratio of input
power to output power. In practice, values of
up to 90% may be obtained.
PWP Package
R
θ
JA
= 178
°
600
C/W
10
400
5
200
0
0
25
50
75
100
125
150
25
50
75
100
125
150
T
A
– Free-Air Temperature –
°
C
T
C
– Case Temperature –
C
005116 - 18
°
Figure 8. Diagram to calculate maximum power dissipation.
ure 6
shows, the connections
ENABLE, IN, OUT, PGND and are all
parallel connected. Both ICs have
their own input capacitor, which like
all other capacitors should be placed
as near a possible to the chip. Natu-
rally, both chips must be configured
and run in the same operational
mode (SKIP, COM, 3V8, SYNC). Fur-
ther synchronisation of both chips is
however not possible. The common
output capacitor ought to be double
the capacitance of the opposite sin-
gle switched capacitor (i.e. 47
µ
F
instead of 22 µF).
Reduction of
Ripple Voltage
The ripple voltage of standard appli-
cations lies round about 5 mV
pp
.
When even this value is too high it
is possible, with an ancillary LC-fil-
ter, to reduce ripple even further.
However this also requires a low
drop-off frequency to be selected (for
(005116)
Literature:
Datasheet and further information at
http://www.ti.com/sc/60100
2/2001
Elektor Electronics
61
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