1441909435 - (2010) Hardware Acceleration of EDA Algorithms Custom ICs, FPGAs and GPUs.pdf - HDL Books - VHDL FPGA CPLD Verilog Digital Electronics eBook - Yohoho25

Hardware Acceleration of EDA Algorithms

Kanupriya Gulati

Sunil P. Khatri

Hardware Acceleration

of EDA Algorithms

Custom ICs, FPGAs and GPUs

123

Kanupriya Gulati

109 Branchwood Trl

Coppell TX 75019

USA

kgulati@tamu.edu

Sunil P. Khatri

Department of Electrical & Computer

Engineering

Texas A & M University

College Station TX

77843-3128

214 Zachry Engineering Center

USA

sunilkhatri@tamu.edu

ISBN 978-1-4419-0943-5

e-ISBN 978-1-4419-0944-2

DOI 10.1007/978-1-4419-0944-2

Springer New York Dordrecht Heidelberg London

Library of Congress Control Number: 2010920238

Springer Science+Business Media, LLC 2010

permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York,

NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in

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they are subject to proprietary rights.

Printed on acid-free paper

Springer is part of Springer Science+Business Media (www.springer.com)

1441909435 - (2010) Hardware Acceleration of EDA Algorithms Custom ICs, FPGAs and GPUs.pdf