2.13 design ideas.pdf

design ideas

readerS SOLVe deSIGN PrOBLeMS

Auto pulse generator senses

and responds to a probed load

Raju Baddi, Tata Institute of Fundamental Research, Pune, India

DIs Inside

52 Read 10 or more switches

using only two I/O pins of a

microcontroller

57 Successfully choose

complementary bipolar transistors

58 Synchronized regulator

produces coherent noise

▶ To see and comment on

all of EDN ’s Design Ideas, visit

www.edn.com/designideas.

↘ This automatic pulse generator

arrangement of probes shown. A regu-

lar arrangement of independent probes

also may be used. The circuit has been

tested with a 5V supply, as well.

Two versions are shown: Figure 1

uses an NE555 timer IC as a mono-

stable and is the easiest to get working.

Figure 2 eliminates the NE555 for a

reduced parts count but could be affect-

ed by variations in the parameters and

different manufacturers of the CD4069

CMOS hex inverter used in place of

the NE555.

Transistors Q 1 and Q 2 are switches

that connect the +ve and −ve probes

to the 3.6V supply and ground when

( figures 1 and 2 ) is a test gadget

that senses a probed contact to a pair of

terminals under test and automatically

issues a momentary power pulse to

them once proper contact is made.

These terminals could be the input of

a logic gate, an LED on a circuit board,

a transformer or relay coil, etc. The

need for such a pulse often arises in the

day-to-day engineering work of experi-

menting and testing.

The gadget is powered with a small

3.6V rechargeable NiCd battery. You

can easily construct it in a glue-stick

tube ( Figure 3 ) with the special

turned on by the CD4069 and the

NE555. R 3 and R 4 bias gate G 1 ’s input

just below the switching threshold to

hold its output high, which holds the

output of gate G 2 low. The time con-

stant formed by C 1 provides a certain

PULSE-ISSUE

INDICATOR

3.6V

10k

BC559

220

Q 1

G 6

7,6

CD4069

PROBES CONNECTED

TO A LARGE INDUCTANCE,

SAY 20 mH

NE555

R 1

100k

G 4

22k

CD4069

BC549

R 3

12M

Q 3

G 3

R 2

270

D 1

R 5

CD4069

100k

G 1

G 2

D 2

1N4007

C 3

0.1 F

CD4069

G 5

CD4069

C 2

0.1 F

R 4

10M

R 6

100k

C 1

0.1 F

10k

BC549

Q 2

Figure 1 The NE555 version is easy to get working but has an increased parts count.

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50 EDN | February 2013

design ideas

3.6V

MONOSTABLE

PULSE-

ISSUE

INDICATOR

D 4

1N4148

220

10k

Q 1

G 4

R 1

100k

G 5

PROBES CONNECTED

TO A LARGE INDUCTANCE,

SAY 20 mH

BC559

CD4069

G 6

CD4069

R F

47k

R 3

12M

D 1

Q 3

BC549

CD4069

G 3

R 2

270

D 2

1N4007

C 3

0.1 F

R 5

D 3

1N4148

100k

G 1

G 2

CD4069

R 4

10M

CD4069

C 1

0.1 F

C 2

0.1 F

R 6

10k

Q 2

T~0.7 TO 1.1 RC

BC549

Figure 2 You can eliminate the NE555, but variations in the G 4 input switching threshold can affect the pulse duration.

amount of noise immunity

and determines the minimum

time for which the test circuit

should be connected between

the probes. The 100-kΩ resis-

tor in series with the input of

G 1 limits the input current in

case the probe is accidentally

connected to an active circuit.

R 1 connects to the junc-

tion of R 3 and R 4 through a

reverse-biased diode, D 1 . It

normally has no effect as long

as the probes are not connect-

ed through a load, because the

series string of R 1 , D 1 , R 2 , and

D 2 is a high-resistance circuit

compared with the 12 MΩ of

R 3 . As soon as you connect a

passive test circuit such as a

resistor/inductor/LED, how-

ever, D 1 and R 2 are paralleled

by it. Thus, the branch in par-

allel with R 3 has a lower resis-

tance and the G 1 input voltage

increases such that it is now

recognized as logic 1, driving

G 1 ’s output low.

R 5 and C 2 form a debounce-

and-delay network to ensure

that the probes are firmly con-

nected to the circuit under

test before the power pulse is

issued. When the output of G 1

goes low, capacitor C 2 begins to

discharge through R 5 . The logic

input voltage of G 2 changes

within a time on the order of

R 5 C 2 .

In Figure 1 , the rising out-

put of G 2 immediately triggers

the NE555 monostable through

G 3 and the differentiator formed

by C 3 and R 6 . Once C 3 has fin-

ished charging through R 6 , G 3 ’s

input returns to ground and its

output returns high to allow

the NE555 to complete its tim-

ing cycle with a duration that

its R and C values determine. 1

The timed logic 1 output of the

NE555 turns on Q 3 to light the

“pulse issued” LED, and through

G 4 , G 5 , and G 6 turns on Q 1 and

Q 2 to present the power pulse to

the circuit under test.

Only one pulse is gener-

ated per contact; removing the

probes and then reconnecting

them will issue a new pulse. If

the circuit under test is induc-

tive and greater than 20 mH at

TIP WIDENED

USING A SHARP

TOOL FOR INSERTING

COMPONENT LEAD

CONNECTING WIRE

GEL-PEN

REFILL TIPS

SPRING (ALSO ACTS

AS CONNECTING WIRE)

GEL-PEN

REFILL PIPE

BETTER TO BEND

A BIT INWARDS

GLUE-STICK CAP

SCREWS

CIRCUIT

BOARD

SWITCH

MOUNTED

ON TUBE

OFF

15 TO 20G

GLUE-STICK

TUBE

3.6V

NiCd

BATTERY

RESISTOR-DIODE

COMBINATION TO

LIMIT THE CURRENT

POWER SOCKET

FOR CHARGING

Figure 3 You can build the automatic pulse generator in a

used glue-stick tube.

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February 2013 | EDN 51

design ideas

the end of the pulse, the inductive back

EMF will flash LED D 1 if the probes are

still connected.

In Figure 2 , the NE555 has been

replaced by a monostable comprising

G 3 and G 4 , D 4 , and R F . R 6 has been

changed to 1 MΩ, and diode D 3 has

been added to the input of G 3 . Resistor

R holds G 4 ’s input high, which in the

quiescent state causes G 4 ’s output to

hold G 3 ’s input low. A rising edge from

G 2 causes a low to couple through the

initially discharged capacitor, C, to G 4 ,

whose rising output is fed back to G 3 as

positive feedback and holds G 3 ’s input

high even if the probes are removed. If

this happens, D 3 becomes reverse biased

and prevents G 2 ’s falling edge from

affecting the monostable operation.

Capacitor C then slowly charges

through resistor R until G 4 ’s input rises

above its switching threshold, and the

positive-feedback process reverses. The

pulse duration depends on the R×C

time constant, and is about 0.7 to 1.1

RC, depending on the G 4 threshold

voltage, which can vary between 0.33

and 0.67 of the supply voltage. The

author suggests 1 MΩ for R and 40 nF

for C, but R could be made variable,

as well. D 4 ensures that C discharges

rapidly as G 3 ’s output returns high.

In either case of Figure 1 or Figure

2 , the momentary high output of the

monostable turns Q 3 on to flash the

pulse-issued indicator LED. It also turns

on both Q 1 and Q 2 to power the probes.

D 2 serves to isolate the −ve probe from

the primary input of the circuit at G 1 to

avoid immediate self-suppression. EDN

RefeRence

1 NE555 data sheet, Figure 11,

Texas Instruments, June 2010,

http://bit.ly/127p7kq.

such as the Maxim DS2408 8-channel

addressable switch.

The first method has several disad-

vantages: The MCU has to have an

ADC function, debounce wait times

reduce the polling rate, and an error

results if the switch is opened during the

ADC sampling time. The second method

also has the drawback of comparatively

low speed; it uses 1-wire communica-

Read 10 or more switches using

only two I/O pins of a microcontroller

Aruna Prabath Rubasinghe, University of Moratuwa, Moratuwa, Sri Lanka

↘ There are several ways to read

an analog MCU pin to read multiple

switches by assigning a unique voltage

to each switch through a resistor net-

work, or you can use a one-wire device,

multiple switch inputs using a

reduced number of microcontroller-unit

(MCU) pins. For example, you can use

S 0

S 1

S 2

CLOCK

PULSE

Q9 11

S 3

CLK

S 4

INTERRUPT

S 5

IC 1

4017

S 6

S 7

S 8

CO 12

RESET

S 9

R 1

4.7k

Figure 1 You can easily expand this circuit to many more than 10 switches, yet still use only two MCU I/O pins, by cascading

multiple CD4017 counters through their carry-outs to the following enables.

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52 EDN | February 2013

design ideas

S 0

S 1

R 3

15k

R 2

10k

S 2

V 1

CLOCK/RESET

PULSE

Q9 11

S 3

CLK

S 4

V 2

INTERRUPT

S 5

R 4

IC 1

4017

S 6

Q 1

S 7

2N2222

S 8

CO 12

S 9

R 1

4.7k

LOGIC HIGH HIGH IMPEDANCE=CLOCK PULSE

LOGIC LOW HIGH IMPEDANCE=RESET PULSE

HIGH IMPEDANCE=IDLE

Figure 2 You can add three resistors and a transistor to implement the occasional synchronizing reset without using a third I/O pin.

START

START_TIMER( );

n=0;

EXTERNAL

INTERRUPT

TIMER

INTERRUPT

USER FUNCTIONS

INFINITE LOOP

DISABLE EXTERNAL

INTERRUPTS( );

BUTTON_FUNCTION(n);

YES

n=0;

n=9?

n=n+1;

10-µSEC_COUNTER_PULSE( );

ENABLE EXTERNAL INTERRUPTS( );

Figure 3 This flowchart displays the process for reading an all-pushbutton system. Only one button at a time should be pressed.

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54 EDN | February 2013

design ideas

tion, which requires continuous polling;

and each poll generates an 8-bit data

sequence relevant to switch positions.

This Design Idea describes a method

for reading multiple pushbuttons or

open/closed switches using only two

digital I/O pins and a timer interrupt of

the MCU ( Figure 1 ). Optionally, a third

I/O pin can be assigned to periodically

reset the CD4017 (a cascadable decoded

1-of-10 Johnson counter) for reliable

operation should an EMI or ESD event

occur that could falsely clock the coun-

ter, or you can use the circuit shown in

Figure 2 and retain the two-pin feature.

The diodes isolate the counter outputs

in the event that two or more switches

are closed at the same time. You can

increase the number of switches con-

nected by cascading multiple CD4017

ICs using a carry-out signal (pin 12) and

a clock signal (pin 14).

Reliable operation fol-

lowing the initial power-up

reset depends on the CD4017

counter’s remaining synchro-

nized with the MCU counter.

This synchronization can be

upset by an ESD or EMI event

such as a nearby cell phone, so

it would be wise to include in

the firmware a periodic hard-

ware reset to the CD4017 to

keep the counts synchronized.

Figure 2 shows how you can

do this without having to use

a third MCU pin.

For this function, you use

the MCU’s ability to keep

its I/O pin in three different

states: high, low, and, by tem-

porarily changing the pin to

an input, high impedance.

In the logic-high state,

transistor Q 1 turns on through

R 4 , making the voltage on V 1

logic high and the voltage on

V 2 below the logic-low level.

This sets the clock pin to a

logic high while keeping the

reset pin at a logic low.

In the logic-low state,

transistor Q 1 turns off, mak-

ing the voltage on V 1 logic

low and the voltage on V 2

above the logic-high level.

This sets the reset pin to logic

high while keeping the clock in the

logic-low state.

In the idle high-impedance state,

transistor Q 1 is turned on through R 3

and R 4 , making the voltage on V 1 and

V 2 below the logic-low level. This sets

both the clock and reset pins of the

CD4017 to a logic-low state.

To send a clock edge, therefore,

change the state in the following man-

ner: high impedance > logic high >

high impedance. Likewise, to reset the

CD4017, change the state as follows:

high impedance > logic low > high

impedance.

The flowchart in Figure 3 is for an

all-pushbutton system and functions

as follows: At the start, the MCU sets

a counter variable to 0 and starts an

interrupt-enabled timer, which is set to

overflow and interrupt at 1-msec inter-

vals. In the timer-interrupt routine, sev-

eral tasks are carried out: External inter-

rupts are disabled; the counter variable

is incremented by 1; a 10-μsec clock

pulse is sent to the CD4017; and the

external interrupt is enabled.

a thIrd I/O PIN caN

Be aSSIGNed tO PerI-

OdIcaLLy reSet the

cd4017 durING aN

eMI Or eSd eVeNt.

As the MCU clocks the CD4017

every 1 msec and increments the coun-

ter variable by 1 if its value is less than

9, the CD4017 output corresponding

to the counter-variable value goes to

logic high from logic low; that is, if

the counter-variable value is 2, then

the decoded 2 output of the

CD4017 (pin 4) is at logic

high while all other outputs

are at logic low. At this time,

if the user pressed pushbut-

ton S 2 , it would send a logic-

high signal to the external

interrupt pin of the MCU.

Pressing any other button

does not generate external

interrupts, because all other

outputs of the CD4017 are in

the logic-low state.

When the MCU receives

the external interrupt, it gets

the current counter-variable

value (which is 2) from its

memory, identifies the pressed

button as S 2 , and thus carries

out the functions relevant to

S 2 . When the counter vari-

able reaches 9, it is set to 0

through the software, as the

CD4017 also resets automati-

cally at the 10th pulse.

Note that only one button

at a time should be pressed; if

two consecutive buttons are

pressed together, there may

not be enough dropout time

between successive counter

states for the interrupt edge to

issue by using the flowchart

shown in Figure 4 . EDN

START

START_TIMER( );

n=0;

TIMER

INTERRUPT

USER FUNCTIONS

INFINITE LOOP

YES

n=0;

n=9?

n=n+1;

10-µSEC_COUNTER_PULSE( );

INPUT_HIGH?

YES

BUTTON_FUNCTION(n);

Figure 4 When non-momentary toggle switches are used,

you can decode multiple combinations of switch closures by

checking the state of the interrupt input.

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56 EDN | February 2013

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