HV9910B LED DRIVER.pdf
(
530 KB
)
Pobierz
Supertex inc.
HV9910B
Universal High Brightness
LED Driver
Features
General Description
►
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Switch mode controller for single switch LED drivers
Enhanced drop-in replacement to the HV9910
Open loop peak current controller
Internal 8.0 to 450V linear regulator
Constant frequency or constant off-time operation
Linear and PWM dimming capability
Requires few external components for operation
The HV9910B is an open loop, current mode, control LED
driver IC. The HV9910B can be programmed to operate in
either a constant frequency or constant off-time mode. It
includes an 8.0 - 450V linear regulator which allows it to work
from a wide range of input voltages without the need for an
external low voltage supply. The HV9910B includes a PWM
dimming input that can accept an external control signal with a
duty ratio of 0 - 100% and a frequency of up to a few kilohertz.
It also includes a 0 - 250mV linear dimming input which can
be used for linear dimming of the LED current.
Applications
The HV9910B is ideally suited for buck LED drivers. Since
the HV9910B operates in open loop current mode control, the
controller achieves good output current regulation without the
need for any loop compensation. PWM dimming response is
limited only by the rate of rise and fall of the inductor current,
enabling very fast rise and fall times. The HV9910B requires
only three external components (apart from the power stage)
to produce a controlled LED current making it an ideal solution
for low cost LED drivers.
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DC/DC or AC/DC LED driver applications
RGB backlighting LED driver
Back lighting of flat panel displays
General purpose constant current source
Signage and decorative LED lighting
Chargers
Typical Application Circuit
C
IN
C
O
D1
L1
C
DD
VIN
VDD
HV9910B
LD
GATE
Q1
PWMD
CS
RT GND
R
CS
R
T
Supertex inc.
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
HV9910B
Ordering Information
Pin Description
Package Options
Device
VIN
1
16
NC
8-Lead SOIC
16-Lead SOIC
NC
2
15
NC
HV9910B
HV9910BLG-G
HV9910BNG-G
NC
3
14
RT
4
13
LD
CS
-G indicates package is RoHS compliant (‘Green’)
12
VIN
1
8
RT
GND
5
VDD
7
CS
2
LD
NC
6
11
NC
GND
3
6
VDD
NC
7
10
NC
GATE
4
5
PWMD
GATE
8
9
PWMD
8-Lead SOIC (LG)
16-Lead SOIC (NG)
Absolute Maximum Ratings
Product Marking
Parameter
Value
Y = Last Digit of Year Sealed
WW = Week Sealed
L = Lot Number
= “Green” Packaging
YWW
9910B
LLLL
V
IN
to GND
-0.5V to +470V
V
DD
to GND
12V
CS, LD, PWMD, GATE, RT to GND
-0.3V to (V
DD
+0.3V)
Package may or may not include the following marks: Si or
8-Lead SOIC (LG)
Junction temperature range
-40°C to +150°C
Storage temperature range
-65°C to +150°C
Top Marking
Continuous power dissipation
(T
A
= +25°C)
8-Lead SOIC
16-Lead SOIC
Y = Last Digit of Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
*May be part of top marking
HV9910BNG
YWW LLLLLLLL
630mW
1300mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Bottom Marking
CCCCCCCCC AAA
Package may or may not include the following marks: Si or
Thermal Resistance
Package
16-Lead SOIC (NG)
θ
ja
8-Lead SOIC
128
O
C/W
16-Lead SOIC
82
O
C/W
Electrical Characteristics
(The specifications are at T
A
= 25°C and V
IN
= 12V, unless otherwise noted.)
Sym Description
Min Typ Max Units Conditions
Input
V
INDC
Input DC supply voltage range
1
*
8.0
-
450
V
DC input voltage
I
INSD
Shut-down mode supply current
*
-
0.5
1.0
mA
Pin PWMD to GND
Notes:
1. Also limited by package power dissipation limit, whichever is lower.
† V
DD
load current external to the HV9910B.
* Denotes the specifications which apply over the full operating ambient temperature range of -40°C < T
A
< +125°C.
# Guaranteed by design.
Supertex inc.
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
2
HV9910B
Electrical Characteristics
(cont.)
(The specifications are at T
A
= 25°C and V
IN
= 12V, unless otherwise noted.)
Sym Description
Min Typ Max Units Conditions
Internal Regulator
V
IN
= 8.0V, I
DD(ext)
(
†)
= 0, 500pF at
GATE; R
T
= 226kΩ, PWMD = V
DD
V
DD
Internally regulated voltage
-
7.25
7.5
7.75
V
V
IN
= 8.0 - 450V, I
DD(ext)
= 0, 500pF at
GATE; R
T
= 226kΩ, PWMD = V
DD
ΔV
DD, line
Line regulation of V
DD
-
0
-
1.0
V
Internal Regulator
I
DD(ext)
= 0 - 1.0mA, 500pF at GATE;
R
T
= 226kΩ, PWMD = V
DD
ΔV
DD, load
Load regulation of V
DD
-
0
-
100
mV
UVLO
V
DD
undervoltage lockout threshold
*
6.45
6.7
6.95
V
V
DD
rising
∆UVLO V
DD
undervoltage lockout hysteresis -
-
500
-
mV
V
DD
falling
Current that the regulator can
supply before IC goes into UVLO
I
IN,MAX
#
5.0
-
-
mA
V
IN
= 8.0V
PWM Dimming
V
EN(lo)
Pin PWMD input low voltage
*
-
-
0.8
V
V
IN
= 8.0 - 450V
V
EN(hi)
Pin PWMD input high voltage
*
2.0
-
-
V
V
IN
= 8.0 - 450V
Pin PWMD pull-down resistance
at PWMD
R
EN
-
50
100
150
kΩ
V
PWMD
= 5.0V
Current Sense Comparator
225
250
275
-40°C < T
A
< +85°C
Current sense pull-in threshold
voltage
V
CS,TH
-
mV
213
250
287
T
A
< +125°C
V
OFFSET
Offset voltage for LD comparator
*
-12
-
12
mV
---
0 < T
A
< +85
O
C, V
LD
= V
DD
,
V
CS
= V
CS,TH
+ 50mV after T
BLANK
-
150
215
280
T
BLANK
Current sense blanking interval
ns
-40 < T
A
< +125
O
C, V
LD
= V
DD
,
V
CS
= V
CS,TH
+ 50mV after T
BLANK
-
145
215
315
V
LD
= V
DD
,
V
CS
= V
CS,TH
+ 50mV after T
BLANK
t
DELAY
Delay to output
-
-
80
150
ns
Oscillator
-
20
25
30
R
T
= 1.00MΩ
f
OSC
Oscillator frequency
kHz
-
80
100
120
R
T
= 226kΩ
GATE Driver
I
SOURCE
GATE sourcing current
-
165
-
-
mA
V
GATE
= 0V, V
DD
= 7.5V
I
SINK
GATE sinking current
-
165
-
-
mA
V
GATE
= V
DD
, V
DD
= 7.5V
t
RISE
GATE output rise time
-
-
30
50
ns
C
GATE
= 500pF, V
DD
= 7.5V
t
FALL
GATE output fall time
-
-
30
50
ns
C
GATE
= 500pF, V
DD
= 7.5V
Notes:
1. Also limited by package power dissipation limit, whichever is lower.
† V
DD
load current external to the HV9910B.
* Denotes the specifications which apply over the full operating ambient temperature range of -40°C < T
A
< +125°C.
# Guaranteed by design.
Supertex inc.
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
3
HV9910B
Application Information
The HV9910B is optimized to drive buck LED drivers using
open-loop peak current mode control. This method of control
enables fairly accurate LED current control without the need
for high side current sensing or the design of any closed loop
controllers. The IC uses very few external components and
enables both Linear and PWM dimming of the LED current.
and any external resistor dividers needed to control the IC.
The VDD pin must be bypassed by a low ESR capacitor to
provide a low impedance path for the high frequency current
of the output GATE driver.
The HV9910B can also be operated by supplying a voltage
at the VDD pin greater than the internally regulated voltage.
This will turn off the internal linear regulator of the IC and the
HV9910B will operate directly off the voltage supplied at the
VDD pin. Please note that this external voltage at the VDD
pin should not exceed 12V.
A resistor connected to the RT pin programs the frequency
of operation (or the off-time). The oscillator produces pulses
at regular intervals. These pulses set the SR flip-flop in the
HV9910B which causes the GATE driver to turn on. The same
pulses also start the blanking timer which inhibits the reset
input of the SR flip flop and prevent false turn-offs due to the
turn-on spike. When the FET turns on, the current through
the inductor starts ramping up. This current flows through
the external sense resistor R
CS
and produces a ramp voltage
at the CS pin. The comparators are constantly comparing
the CS pin voltage to both the voltage at the LD pin and
the internal 250mV. Once the blanking timer is complete, the
output of these comparators is allowed to reset the flip flop.
When the output of either one of the two comparators goes
high, the flip flop is reset and the GATE output goes low. The
GATE goes low until the SR flip flop is set by the oscillator.
Assuming a 30% ripple in the inductor, the current sense
resistor R
CS
can be set using:
Although the VIN pin of the HV9910B is rated up to 450V,
the actual maximum voltage that can be applied is limited
by the power dissipation in the IC. For example, if an 8-pin
SOIC (junction to ambient thermal resistance R
θ,j-a
= 128°C/
W) HV9910B draws about I
IN
= 2.0mA from the VIN pin, and
has a maximum allowable temperature rise of the junction
temperature limited to about ΔT = 100°C, the maximum volt-
age at the VIN pin would be:
0.25V (or V
LD
)
1.15 • I
LED
(A)
R
CS
=
In these cases, to operate the HV9910B from higher input
voltages, a Zener diode can be added in series with the VIN
pin to divert some of the power loss from the HV9910B to
the Zener diode. In the above example, using a 100V zener
diode will allow the circuit to easily work up to 450V.
Constant frequency peak current mode control has an in-
herent disadvantage – at duty cycles greater than 0.5, the
control scheme goes into subharmonic oscillations. To pre-
vent this, an artificial slope is typically added to the current
sense waveform. This slope compensation scheme will af-
fect the accuracy of the LED current in the present form.
However, a constant off-time peak current control scheme
does not have this problem and can easily operate at duty
cycles greater then 0.5 and also gives inherent input volt-
age rejection making the LED current almost insensitive to
input voltage variations. But, it leads to variable frequency
operation and the frequency range depends greatly on the
input and output voltage variation. HV9910B makes it easy
to switch between the two modes of operation by changing
one connection (see oscillator section).
The input current drawn from the VIN pin is a sum of the
1.0mA current drawn by the internal circuit and the current
drawn by the GATE driver (which in turn depends on the
switching frequency and the GATE charge of the external
FET).
I
IN
≈ 1.0mA + Q
G
• f
S
In the above equation, f
S
is the switching frequency and Q
G
is the GATE charge of the external FET (which can be ob-
tained from the datasheet of the FET).
Input Voltage Regulator
The HV9910B can be powered directly from its VIN pin and
can work from 8.0 - 450VDC at its VIN pin. When a voltage
is applied at the VIN pin, the HV9910B maintains a constant
7.5V at the VDD pin. This voltage is used to power the IC
Supertex inc.
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
4
HV9910B
Current Sense
The current sense input of the HV9910B goes to the non-
inverting inputs of two comparators. The inverting terminal
of one comparator is tied to an internal 250mV reference
whereas the inverting terminal of the other comparator is
connected to the LD pin. The outputs of both these com-
parators are fed into an OR GATE and the output of the OR
GATE is fed into the reset pin of the flip-flop. Thus, the com-
parator which has the lowest voltage at the inverting terminal
determines when the GATE output is turned off.
Linear Dimming
The Linear Dimming pin is used to control the LED current.
There are two cases when it may be necessary to use the
Linear Dimming pin.
►
In some cases, it may not be possible to find the exact
R
CS
value required to obtain the LED current when the
internal 250mV is used. In these cases, an external volt-
age divider from the VDD pin can be connected to the LD
pin to obtain a voltage (less than 250mV) corresponding to
the desired voltage across R
CS
.
The outputs of the comparators also include a 150-280ns
blanking time which prevents spurious turn-offs of the exter-
nal FET due to the turn-on spike normally present in peak
current mode control. In rare cases, this internal blanking
might not be enough to filter out the turn-on spike. In these
cases, an external RC filter needs to be added between the
external sense resistor (R
CS
) and the CS pin.
►
Linear dimming may be desired to adjust the current
level to reduce the intensity of the LEDs. In these cases,
an external 0-250mV voltage can be connected to the LD
pin to adjust the LED current during operation.
To use the internal 250mV, the LD pin can be connected to
VDD.
Please note that the comparators are fast (with a typical
80ns response time). Hence these comparators are more
susceptible to be triggered by noise than the comparators
of the HV9910. A proper layout minimizing external induc-
tances will prevent false triggering of these comparators.
Note:
Although the LD pin can be pulled to GND, the output cur-
rent will not go to zero. This is due to the presence of a mini-
mum on-time (which is equal to the sum of the blanking time
and the delay to output time) which is about 450ns. This will
cause the FET to be on for a minimum of 450ns and thus the
LED current when LD = GND will not be zero. This current is
also dependent on the input voltage, inductance value, for-
ward voltage of the LEDs and circuit parasitics. To get zero
LED current, the PWMD pin has to be used.
Oscillator
The oscillator in the HV9910B is controlled by a single re-
sistor connected at the RT pin. The equation governing the
oscillator time period t
OSC
is given by:
t
OSC
(μs) =
R
T
(kΩ) + 22
PWM Dimming
PWM Dimming can be achieved by driving the PWMD pin
with a low frequency square wave signal. When the PWM
signal is zero, the GATE driver is turned off and when the
PWMD signal if high, the GATE driver is enabled. Since the
PWMD signal does not turn off the other parts of the IC,
the response of the HV9910B to the PWMD signal is almost
instantaneous. The rate of rise and fall of the LED current is
thus determined solely by the rise and fall times of the induc-
tor current.
25
If the resistor is connected between RT and GND, HV9910B
operates in a constant frequency mode and the above equa-
tion determines the time-period. If the resistor is connected
between RT and GATE, the HV9910B operates in a constant
off-time mode and the above equation determines the off-
time.
GATE Output
The GATE output of the HV9910B is used to drive an ex-
ternal FET. It is recommended that the GATE charge of the
external FET be less than 25nC for switching frequencies
≤100kHz and less than 15nC for switching frequencies >
100kHz.
To disable PWM dimming and enable the HV9910B perma-
nently, connect the PWMD pin to VDD.
Supertex inc.
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
5
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